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15.4 Adders and subtractors

4 min readaugust 6, 2024

Adders and subtractors are key building blocks in digital circuits. They enable basic arithmetic operations on binary numbers, from simple half adders to complex multi-bit adders like ripple carry and carry look-ahead adders.

These circuits are essential for performing calculations in computers. Understanding their design and operation is crucial for grasping how digital systems process numerical data and handle arithmetic operations efficiently.

Adders

Half Adder and Full Adder

Top images from around the web for Half Adder and Full Adder
Top images from around the web for Half Adder and Full Adder
  • performs on two single-bit binary numbers (
    A
    and
    B
    )
    • Consists of an to generate the sum (
      S
      ) and an to generate the carry out (
      C
      )
    • Truth table for a half adder:
      ABSC
      0000
      0110
      1010
      1101
  • performs binary addition on three single-bit binary numbers (
    A
    ,
    B
    , and a carry in
    Cin
    )
    • Consists of two half adders and an
    • Generates the sum (
      S
      ) and the carry out (
      Cout
      )
    • Truth table for a full adder:
      ABCinSCout
      00000
      00110
      01010
      01101
      10010
      10101
      11001
      11111

Multi-bit Adders

  • (RCA) is a digital circuit that performs binary addition on multi-bit numbers
    • Constructed by cascading full adders, with the carry out of each full adder connected to the carry in of the next full adder
    • increases linearly with the number of bits, as each full adder must wait for the carry from the previous stage
  • Carry look-ahead adder (CLA) improves upon the ripple carry adder by reducing the propagation delay
    • Generates carry signals in advance based on the input signals
    • Utilizes additional logic to determine the carry bits, allowing multiple stages to be computed simultaneously
    • Faster than the ripple carry adder but requires more complex hardware

Subtractors

Half Subtractor and Full Subtractor

  • performs binary subtraction on two single-bit binary numbers (
    A
    and
    B
    )
    • Consists of an XOR gate to generate the difference (
      D
      ) and an AND gate with one inverted input to generate the borrow out (
      Bout
      )
    • Truth table for a half subtractor:
      ABDBout
      0000
      0111
      1010
      1100
  • performs binary subtraction on three single-bit binary numbers (
    A
    ,
    B
    , and a borrow in
    Bin
    )
    • Consists of two half subtractors and an OR gate
    • Generates the difference (
      D
      ) and the borrow out (
      Bout
      )
    • Truth table for a full subtractor:
      ABBinDBout
      00000
      00111
      01011
      01101
      10010
      10100
      11000
      11111

Arithmetic and Overflow

Two's Complement Arithmetic

  • is a mathematical operation on binary numbers used to represent signed integers
    • Positive numbers are represented as-is, while negative numbers are represented by inverting all bits and adding 1
    • Allows for addition and subtraction to be performed using the same circuitry
    • Range of representable numbers for n bits: 2n1-2^{n-1} to 2n112^{n-1}-1
  • Addition and subtraction in two's complement
    • Addition is performed using a standard adder (ripple carry or carry look-ahead)
    • Subtraction is performed by negating the subtrahend (inverting bits and adding 1) and then adding it to the minuend

Overflow Detection

  • Overflow occurs when the result of an arithmetic operation exceeds the representable range of the number system
    • In two's complement, overflow happens when adding two numbers with the same sign produces a result with the opposite sign
    • Overflow can be detected by comparing the carry into the most significant bit (MSB) with the carry out of the MSB
      • If the carry into the MSB and the carry out of the MSB are different, an overflow has occurred
  • Overflow detection is crucial for maintaining data integrity and preventing unexpected behavior in digital systems
    • Ignoring overflow can lead to incorrect results and potential system failures
    • Overflow detection allows for appropriate handling of exceptional cases (saturating arithmetic, error reporting, or exception handling)
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© 2024 Fiveable Inc. All rights reserved.
AP® and SAT® are trademarks registered by the College Board, which is not affiliated with, and does not endorse this website.

© 2024 Fiveable Inc. All rights reserved.
AP® and SAT® are trademarks registered by the College Board, which is not affiliated with, and does not endorse this website.
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